Sankur Kundu

tandem · distributed training from scratch

in lockstep.

The parallelisms behind large-model training, on PyTorch tensors and autograd but with no torch.distributed and no NCCL: its own ring all-reduce, reduce-scatter and all-gather underneath DDP, ZeRO-1, 2 and 3, and GPipe and 1F1B pipelines. On two T4 GPUs every one ends with exactly PyTorch's weights.

GPU0GPU1GPU2GPU3ring all-reducereduce-scatter, then all-gathershared-memory rings, CUDA IPCno NCCL anywhere
0.0Largest weight difference from PyTorch DDP and FSDP after 20 steps on two T4s, for DDP and ZeRO-1, 2 and 3
1.6–2.8×Faster all-reduce with the C++/CUDA engine than the Python one on a T4, 64 KB to 64 MB
±2%Of NCCL's all-reduce bandwidth at 64–256 MB with the Python engine across two T4s
17% / 32–52%Less memory per GPU with ZeRO-3 than DDP, and with 1F1B than GPipe, on an 86M-parameter GPT
01 · Exactness

Bit-identical to PyTorch

bench/run.py verify on two Tesla T4s: after 20 training steps, every mode ends with the same losses and weights as PyTorch.

tandem modeChecked againstWeights
DDPtorch DDP (NCCL)equal
ZeRO-1torch DDP (NCCL)equal
ZeRO-2torch DDP (NCCL)equal
ZeRO-3 (FSDP-style)torch DDP (NCCL)equal
Pipeline, 1F1Bone processequal

torch FSDP matches torch DDP too, so ZeRO-3 is equal to both.

02 · The C++ engine

Collectives without NCCL

The collectives moved into a PyTorch C++ extension: lock-free single-producer, single-consumer rings in shared memory and a progress thread on the CPU; on GPUs, buffers shared through CUDA IPC, ordered by interprocess events and reduced by a fused CUDA kernel, so the host never waits for a piece.

All-reduce on a Tesla T4Python engineC++ engineSpeed-up
64 KB1.79 ms0.64 ms2.8×
1 MB1.53 ms0.83 ms1.9×
4 MB1.65 ms0.75 ms2.2×
64 MB10.00 ms6.24 ms1.6×

Results bit-identical between the two engines.

03 · Parallelisms

Every way to split a model

Each parallelism is built on the same three collectives, in the order Megatron-LM and FSDP use them.

DDP, overlapped

Gradient buckets reduced as backward fills them, so communication hides behind compute.

ZeRO-1, 2 and 3

Sharded optimizer state, gradients and, FSDP-style, parameters gathered just before use and prefetched: 17% less memory per GPU than DDP.

GPipe and 1F1B

Pipeline schedules in Megatron-LM's order; 1F1B uses 32–52% less memory than GPipe on an 86M-parameter GPT.

What tandem adds

Large-model training, understood from the wire up

What torch.distributed, NCCL, DeepSpeed and Megatron do, rebuilt so that every byte on the wire is accounted for.

  1. Own collectives

    Ring all-reduce, reduce-scatter and all-gather within 2% of NCCL's bandwidth at 64–256 MB.

  2. Every parallelism

    DDP, ZeRO-1/2/3 and GPipe/1F1B, bit-identical to PyTorch after 20 steps.

  3. A C++/CUDA engine

    Shared-memory rings, CUDA IPC and a fused reduce kernel: 1.6–2.8× faster.

  4. Memory, measured

    ZeRO-3 17% less than DDP; 1F1B 32–52% less than GPipe.

Where it falls short

tandem's DDP reaches 86% of PyTorch DDP's throughput, and the C++ engine has not yet been timed against NCCL across two GPUs.

@software{kundu2026tandem,
  author  = {Kundu, Sankur},
  title   = {tandem: distributed training on its own collectives},
  year    = {2026},
  url     = {https://github.com/Shakhtar-Sankur/tandem},
  license = {Apache-2.0}
}
Sankur Kundu

Sankur Kundu

ML systems engineer & independent researcher · Bhubaneswar, India · sankur.kundu.tw@gmail.com

Builds the systems that train and serve language models. Also the author of lipi, a tokenizer that needs fewer tokens than GPT-4o's and Gemini's in 23 of 24 Indian languages; Babelguard, an open early-warning system for scams across languages; ratchet, RL post-training from scratch; kessler, an independent space-traffic audit that runs every day. Fixes merged into Apple's MLX, Meta's ExecuTorch, Hugging Face's OpenEnv and Oxford's PyZX, and pull requests in review at Google's JAX, NVIDIA, MIT, Carnegie Mellon and ETH Zurich.